3-D chip (3D chip)

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3-D chip (3D chip)

A 3-D chip is an integrated circuit ( IC ) containing a three-dimensional array of interconnected devices performing digital, analog, image processing and neural-network functions, either individually or in combination.

See an image of a thinned wafer used to create a 3-D chip

3-D chip technology solves a number of issues that have been challenging chip manufacturers looking for performance increases and reductions in processor size. As chips have grown smaller and more powerful, the wires that connect the increasing numbers of transistor s have necessarily become both thinner and closer together, resulting in increased resistance and overheating. Both can cause signal delays, limiting the clock speed of central processing unit s.

In April 2007, a new version of 3-D chips was announced by a partnership of IBM and Rensselaer Polytechnic Institute (RPI) researchers at the IBM T.J. Watson Research Center, with support from the Defense Advanced Research Project Agency ( DARPA ). These 3-D chips layer one chip upon another using a technique called wafer bonding . While some companies currently package processors by layering one upon another, IBM's technique uses one base layer of silicon with active wafers layered on top. This allows engineers to place a processor on the bottom of the stack and then layer memory or other components across the top, resulting in a thousand-fold decrease in connector length, as chips are no longer organized in a two-dimensional layouts with wires connecting transistors at the periphery of chips. This reduces the distance data has to travel, resulting in much faster processing. Similarly, a hundred-fold increase in connector density dramatically reduces the size of the chip.

IBM 's engineers used a new method of manufacturing called through-silicon vias that allows multiple chip components to be stacked upon one another vertically, creating faster, smaller and lower-power CPU s (central processing units). Through-silicon vias also allow for more efficient heat dissipation up through the stack to cooling systems and, according to IBM, improve power-efficiency in silicon-germanium based products up to 40%, resulting in longer battery life.

IBM expects to begin production of 3-D chips in 2008. "Big Blue" will be applying the technology initially in mobile devices and wireless communications. Memory-on-processor technology will be available for use in servers and supercomputers in 2009. Intel used a similar 3-D chip structure in February 2007 capable of teraflop processing (a trillion calculations per second), effectively performing calculations as quickly as a complete data center while consuming a tiny fraction of the energy. Either of these improvements may allow the extension of Moore's Law well into the 21st century.

Read more about it at:
> Read the official research paper in the IBM Journal of Research and Development: Three-dimensional integrated circuits.
> Rensselaer researchers reach for new heights with 3-D chip technology.
> Rick Hodgin, the "ChipGeek," comments on the IBM breakthrough in "3-D Chips: Not just for cookies."
> 3-D Chips: IBM Moves Moore's Law Into The Third Dimension.
> Big Blue crows over 3D chip advance.
> Reed Electronics provides an overview of the reasons the industry is moving towards 3-D chips.
Last updated on: Mar 21, 2011

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