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memory coherence

Contributor(s): Stan Gibilisco

Memory coherence is a desirable condition in which corresponding memory locations for each processing element in a multi-core processor always contain the same cached data. Without memory coherence, programs can be adversely affected.

In multi-core processors, two or more processing elements work concurrently. Once in a while they will simultaneously access the same memory location. As long as no processing element alters the data at the affected location, all of those elements can share and cache the data without any problems. But if one of the processing elements changes the data in the shared location and does not inform the others of the change, the other elements might use the outdated version of the data that remains in their local caches.

In a multi-core processing system, a so-called memory coherence protocol notifies all the processing elements of changes to shared values, thereby ensuring that all copies of the data remain consistent.

This was last updated in July 2012

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